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W948D6FB / W948D2FB
256Mb Mobile LPDDR
5.2 Simplified State Diagram
Power
Power
applied
On
DPDSX
Deep
Self
Refresh
Power
Down
REFS
SRR
Precharge
All Bank
DPDS
REFSX
SRR
Read
Read
MRS
EMRS
MRS
Idle
All banks
precharged
REFA
Auto
Refresh
CKEL
CKEH
Precharge
Active
Power
Down
CKEL
CKEH
ACT
Row
Active
Power
Down
Burst
Stop
WRITE
WRITE
WRITE
READ
READA
BST
READ
WRITE
WRITEA
READ
READA
READ
READA
WRITE A
PRE
PRE PRE
READ A
PRE
Precharge
PREALL
Automatic Sequence
Command Sequence
ACT =Active
BST = Burst Terminate
CKEL= Enter Power - Down
EMRS= Ext . Mode Reg . Set
MRS = Mode Register Set
PRE = Precharge
REFSX = Exit Self Refresh
READ = Read w/o Auto Precharge
READA = Read with Auto Precharge
CKEH =Exit Power - Down
-
-
DPDS = Enter Deep Power Down
DPDSX = Exit Deep Power Down
PREALL = Precharge All Bank
REFA = Auto Refresh
REFS = Enter Self Refresh
WRITE = Write w/o Auto Precharge
WRITEA = Write with Auto Precharge
SRR = Status Register Read
Note: Use caution with this diagram . It is indented to provide a floorplan of the possible state transitions and commands to control them , not
all details .In particular situations involving more than one bank are not captured in full detall .
Publication Release Date : Oct, 15, 2012
-9-
Revision : A01-004
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